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features ultra small surface mount package minimal height: 2.5 mm v cc from 2.7 to 3.6 volts withstands > 250 mv p-p power supply ripple led supply voltage can range from 2.7 to 6.0 volts low shutdown current C 20 na typical irda w data 1.2 low power compliant 115.2 kb/s infrared transceiver technical data HSDL-3201 complete shutdown C txd, rxd, pin diode one optional external component temperature range: -25 c to 85 c 32 ma led drive current integrated emi shield iec825-1 class 1 eye safe edge detection input C prevents the led from long turn on time irda 1.2 low power irda 1.0/1.2 standard or low power 30?illumination cone cell phones pagers pdas cameras cell phones pagers printers pcs pdas cameras 20 cm to low power devices 30 cm to standard devices
2 applications mobile telecom C cellular phones C pagers C smart phones data communication C pdas C portable printers digital imaging C digital cameras C photo-imaging printers description the HSDL-3201 is one of a new generation of low-cost infrared (ir) transceiver modules from agilent technologies. it features the smallest footprint in the industry at 2.5 h x 8.0 w x 3.0 d mm. although the supply voltage can range from 2.7 v to 3.6 v, the led drive current is internally compensated to a constant 32 ma to assure that link distances meet the irda data 1.2 (low power) physical layer specifications. the HSDL-3201 meets the 20 cm link distance to other irda 1.2 low power devices, and a 30 cm link distance to irda 1.2 standard devices. i/o pins configuration table pin symbol description notes 1 gnd ground connect to system ground. 2 nc no connection this pin must be left unconnected. 3v cc supply voltage regulated: 2.7 to 3.6 volts 4 agnd analog ground connect to a quiet ground. 5 sd shut down this pin must be driven active high either high or low. do not float the pin. 6 rxd receiver data output is a low pulse for output. active low. 2.4 m s when a light pulse is seen. 7 txd transmitter data logic high turns the led input. active high. on. if held high longer than ~ 20 m s, the led is turned off. txd must be driven high or low. do not float the pin. 8 vled led voltage may be unregulated: 2.7 to 6.0 volts. - shield emi shield connect to system ground via a low inductance trace. for best performance, do not directly connect to gnd or agnd at the part. application circuit pinout, rear view vled txd 7 led current source rxd 6 shut down 5 rx pulse shaper txd 8 vled 4 agnd sd rxd v cc 3 v cc 2 nc 1 gnd c1 1.0 ? shield 87654321
3 recommended application circuit components component recommended value note c1 1.0 m f1 absolute maximum ratings for implementations where case to ambient thermal resistance is 50 c/w. parameter symbol min. max. units storage temperature t s -40 100 c operating temperature t a -25 85 c led supply voltage v vled -0.5 7 v supply voltage v cc -0.5 7 v input voltage: txd, sd v i 0v cc + 0.5 v output voltage: rxd v o -0.5 v cc + 0.5 v solder reflow see reflow profile, page 13 temperature profile transceiver i/o truth table the led and rxd outputs are controlled by the combination of the txd and sd pins and light falling on the receiver. as shown in the table below, the transmitter is non-inverting; the led is on when the txd pin is high and off when txd is low. the receiver is inverting; the rxd pin is low during irda signal pulses and high when the receiver does not see any light. when shutdown (sd pin high), the led is off (the state of the txd pin does not matter), and the rxd pin is pulled high with a weak internal pullup. sd txd led receiver rxd notes high on dont care not valid 2, 3 low low off irda signal low 4, 5 no signal high high dont care off dont care high 6 shutdown mode notes when the HSDL-3201 is in shutdown mode (sd pin high), the part presents different impedances to the rest of the circuit than when it is in normal mode. rxd pin: this pin is not tri- state. during shutdown the equivalent circuit is a weak pullup (~300 k w ) to v cc . the esd protection diodes to v cc and ground are also present. txd pin: input protection diodes are present. vled pin: possible leakage current of 1.5 na. sd pin: will draw approximately 16 na when driven high. marking information the unit is marked with the letters hpl and the datecode yww on the shield. y is the last digit of the year, and ww is the workweek. ordering information specify the part number followed by an option number. HSDL-3201#xxx there are three options available: 011 taped in a short strip (no reel), 10 per strip 001 taped and 7 reel packaging, 500 per reel 021 taped and 13 reel packaging, 2500 per reel caution: the bicmos inherent to this design of this component increases the components susceptibility to damage from electrostatic discharge (esd). it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd.
4 recommended operating conditions parameter symbol min. max. units conditions notes operating temperature t a -25 85 c supply voltage v cc 2.7 3.6 v led supply voltage v led 2.7 6.0 v txd, sd input logic high v ih 2/3 v cc v cc v voltage logic low v il 0 1/3 v cc v receiver input logic high ei h 0.0081 500 mw/cm 2 for in-band signals. 7 irradiance logic low ei l 0.3 m w/cm 2 for in-band signals. 7 receiver data rate 2.4 115.2 kb/s ambient light see test methods on page 16 for details rxd output waveform led optical waveform txd stuck on protection receiver wakeup time definition transmitter wakeup time definition t f v oh 90% 50% 10% v ol t pw t r t f led off 90% 50% 10% led on t pw t r t pw (max.) txd led rx light t rw rxd sd tx light t tw txd sd
5 electrical & optical specifications specifications hold over the recommended operating conditions unless otherwise noted. unspecified test conditions may be anywhere in their operating range. all typical values are at 25 c and 3.0 v unless otherwise noted. parameter symbol min. typ. max. units conditions note receiver viewing angle 2 f 1/2 30 peak sensitivity l p 880 nm wavelength rxd output logic high v oh v cc -0.2 v cc vi oh =-200 m a, ei 0.3 m w/cm 2 voltage logic low v ol 0 0.4 v i ol =200 m a8 rxd pulse width t pw 2.0 2.45 3.0 m s8 rxd rise time t r 11 20 ns t pw (ei)=1.6 m s, c l =10 pf rxd fall time t f 16 25 ns t pw (ei)=1.6 m s, c l =10 pf receiver latency time t l 25 50 m s9 receiver wake up time t rw 28 40 m s10 transmitter radiant intensity ei h 4 9 28.8 mw/sr t a =25 c, q 1/2 15 , txd 3 2/3 v cc viewing angle 2 q 1/2 30 60 peak wavelength l p 875 nm spectral line half width dl 1/2 35 nm optical pulse width t opw 1.41 1.6 2.23 m st pw (txd)=1.6 m s max. optical pulse width t opwm 20 30 m s txd pin stuck high optical rise time t or 180 600 ns t pw (txd)=1.6 m s optical fall time t of 180 600 ns t pw (txd)=1.6 m s txd logic high v ih 2/3 v cc v cc v levels low v il 0 1/3 v cc v txd input high i h 25 na v i 3 2/3 v cc current low i l -15 na 0 v i 1/3 v cc led on i vled 32 ma v vled =v cc =3.6 v, v i (txd) 3 2/3 v cc current off i vled 1.5 na v vled =v cc =3.6 v, v i (txd) 1/3 v cc shutdown i vled 1.5 na v i (sd) 3 2/3 v cc transmitter wake up time t tw 12 20 m s11 transceiver sd logic high v ih 2/3 v cc v cc v levels low v il 0 1/3 v cc v sd input high i h 16 na v i 3 2/3 v cc current low i l -150 na 0 v i 1/3 v cc dc supply shutdown i cc1 20 200 na v cc =3.6 v,v sd 3 v cc - 0.5, t a =25 c current idle i cc2 100 m a v cc =3.6 v, v i (txd) 1/3 v cc , ei=0 ac supply active, receive i cc3 0.8 3.0 ma v cc =3.6 v, v i (txd) 1/3 v cc 12,13 current active, i cc4 9.0 ma v cc =3.6 v, v i (txd) 3 2/3 v cc 14 transmit notes at top of next page.
6 notes on supply current the supply current for the HSDL-3201 has two different components, dc and ac. the dc component is measured in two states, normal (idle mode) and shutdown. this current is present whenever power is applied to the part. the ac component is either the extra current drawn from the v cc pin by the photodiode when it sees light, or the current needed by the led current circuit. the values in the table are peak values. since irda data is transmitted with a 3/16 duty cycle, the average value is 3/16 of the peak. the ac current is not drawn when no light is present. notes: 1. c1, which is optional, must be placed within 0.7 cm of the HSDL-3201 to obtain optimum noise immunity. 2. if txd is stuck in the high state, the led will turn off after about 20 m s. 3. rxd will echo the txd signal while txd is transmitting data. 4. in-band irda signals and data rates 115.2 kb/s. 5. rxd logic low is a pulsed response. the pulse width is 2.4 m s, independent of data rate. 6. rxd logic high during shutdown is a weak pullup resistor (300 k w ). 7. an in-band optical signal is a pulse/sequence where the peak wavelength, l p, is defined as 850 nm l p 900 nm, and the pulse characteristics are compliant with the irda serial infrared physical layer link specification. 8. for in band signals 115.2 kb/s where 8.1 m w/cm 2 ei 500 mw/cm 2 . 9. latency is defined as the time from the last txd light output pulse until the receiver has recovered full sensitivity. 10. receiver wake up time is measured from the sd pin high to low transition or v cc power on, to a valid rxd output. 11. transmitter wake up time is measured from the sd pin high to low transition or v cc power on, to a valid light output in response to a txd pulse. 12. typical values are at ei = 10 mw/cm 2 13. maximum value is at ei = 500 mw/cm 2 . 14. current is due to internal stages of the led current mirror. this current is in addition to the iled current. distances between units to see a 10 mw/cm 2 light level type of distance transceiver (cm) typical 1.0 HSDL-3201 max. brightness 1.7 HSDL-3201 typical sir 2.0 typical fir 3.2 the 500 mw/cm 2 light level is for the maximum brightness irda unit at 1 cm. figure 3. power supply ripple rejection. (no c1). figure 1. led current vs. v cc . figure 2. led current vs. vled. iled ?ma 34.0 v cc ?volts 32.5 3.1 3.4 31.0 31.5 2.7 3.6 33.0 2.8 3.2 33.5 32.0 2.9 3.0 3.3 3.5 vled = 3.6 volts iled ?ma 34.0 vled ?volts 32.5 3.1 3.4 31.0 31.5 2.7 3.6 33.0 2.8 3.2 33.5 32.0 2.9 3.0 3.3 3.5 v cc = 3.6 volts v cc = 3.3 volts v cc = 3.0 volts v cc = 2.7 volts v cc ripple voltage ?v ripple frequency ?hz 0.6 0 0.2 10 e+3 10 e+6 0.8 1.0 0.4 100 e+3 1 e+6
7 package dimensions 2.85 mounting center 4.0 1.025 unit: mm tolerance: ?0.2 mm coplanarity = 0.1 mm max. c l 2.5 4.0 8.0 2.05 2.55 emitter receiver 0.35 0.65 0.80 c l 3.325 6.65 0.6 2.9 3.0 1.85 1.05 1.25 1.175 2.2 pin 1
8 tape and reel dimensions 16.4 + 2 0 21 ?0.8 unit: mm b c ? 13.0 ?0.5 2.0 ?0.5 2.0 ?0.5 label 3.4 ?0.1 8.4 ?0.1 8.0 ?0.1 4.0 ?0.1 1.5 ?0.1 7.5 ?0.1 16.0 ?0.2 1.75 ?0.1 ? 1.5 + 0.1 0 0.4 ?0.05 2.8 ?0.1 polarity pin 8: vled pin 1: gnd option # "b" "c" quantity 001 021 178 330 60 80 500 2500 empty parts mounted leader empty (40 mm min.) (400 mm min.) (40 mm min.) progressive direction r 1.0 detail a detail a unit: mm
9 moisture proof packaging the hdsl-3201 is shipped in moisture proof packaging. once opened, moisture absorption begins. recommended storage conditions storage 10 c to 30 c temperature relative humidity below 60% rh time from unsealing to soldering after removal from the bag, the parts should be soldered within two days if stored at the recommended storage conditions. if times longer than two days are needed, the parts must be stored in a dry box. baking if the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. package temp. time in reels 60 c 3 48 hours 100 c 3 4 hours in bulk 125 c 3 2 hours 150 c 3 1 hour baking should only be done once. solder pad, mask and metal stencil recommended land pattern metal stencil for solder paste printing land pattern pcb stencil aperture solder mask 0.60 1.25 1.75 1.35 0.10 0.475 1.425 2.375 3.325 c l mounting center shield solder pad fiducial 2.05 0.775 unit: mm
10 recommended metal solder stencil aperture it is recommended that only a 0.152 mm (0.006 inches) or a 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. this is to ensure adequate printed solder paste volume and no shorting. see the table below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. aperture opening for shield pad is 2.7 mm x 1.25 mm as per land pattern. adjacent land keep-out and solder mask areas adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. there should be no other smd components within this area. the minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. it is recommended that two fiducial crosses be place at mid- length of the pads for unit alignment. note: wet/liquid photo- imageable solder resist/mask is recommended. stencil thickness, t (mm) aperture size(mm) length, l width, w 0.152 mm 2.60 0.05 0.55 0.05 0.127 mm 3.00 0.05 0.55 0.05 apertures as per land dimensions l w t 0.2 3.0 8.2 2.6 solder mask units: mm
11 pcb layout suggestion the following pcb layout shows a recommended layout that should result in good electrical and emi performance. things to note: 1. the ground plane should be continuous under the part, but should not extend under the shield trace. 2. the shield trace is a wide, low inductance trace back to the system ground. 3. the agnd pin is connected to the ground plane and not to the shield tab. 4. c1 is an optional v cc filter capacitor; it may be left out if the v cc is clean. 5. vled can be connected to either unfiltered or unregulated power. if c1 is used, and if vled is connected to v cc , the connection should be before the c1 cap. vled c1 txd rxd shutdown v cc shield ground component side circuit side
12 recommended solder paste/cream volume for castellation joints based on calculation and experi- ment, the printed solder paste volume required per castellation pad is 0.22 cubic mm (based on either no-clean or aqueous solder cream types with typically 60% to 65% solid content by volume). using the recommended stencil results in this volume of solder paste. pick and place misalignment tolerance and self-alignment after solder reflow if the printed solder paste volume is adequate, the HSDL-3201 will self align after solder reflow. units should be properly reflowed in ir/hot air convection oven using the recommended reflow profile. the direction of board travel does not matter. direction definition tolerance for x- axis alignment of castellation misalignment of castellation to the land pad should not exceed 0.2 mm or about one half the width of the castellation during placement of the unit. the castellations will self-align to the pads during solder reflow. tolerance for rotational ( q ) misalignment mounted units should not be rotated more than 3 degrees with reference to center x-y as shown in the direction definition. units that are rotated more than 3 degrees will not self align after solder reflow. units with less than a 3 degree misalign- ment will self-align after solder reflow. allowable misalignment direction tolerance x 0.2 mm y see text q 3 degrees y- axis misalignment of castellation in the y direction, the HSDL-3201 does not self align after solder reflow. agilent recommends that the part be placed in line with the fiducial mark (mid-length of land pad.) this will enable sufficient land length (minimum of one half of the land pad) to form a good joint. see the drawing below. y q x minimum 1/2 the length of the land pad edge fiducial
13 reflow profile process zone symbol d t maximum d t/ d time heat up p1, r1 25 c to 125 c4 c/s solder paste dry p2, r2 125 c to 170 c 0.5 c/s solder reflow p3, r3 170 c to 230 c (245 c max.) 4 c/s p3, r4 230 c to 170 c-4 c/s cool down p4, r5 170 c to 25 c-3 c/s the reflow profile is a straight line representation of a nominal temperature profile for a convective reflow solder process. the temperature profile is divided into four process zones, each with different d t/ d time temperature change rates. the d t/ d time rates are detailed in the above table. the temperatures are measured at the component to printed circuit board connections. in process zone p1 , the pc board and HSDL-3201 castellation pins are heated to a temperature of 125 c to activate the flux in the solder paste. the temperature ramp up rate, r1, is limited to 4 c per second to allow for even heating of both the pc board and HSDL-3201 castellations. process zone p2 should be of sufficient time duration (greater than 60 seconds), to dry the solder paste. the temperature is raised to a level just below the liquidus point of the solder, usually 170 c (338 f). process zone p3 is the solder reflow zone. in zone p3, the temperature is quickly raised above the liquidus point of solder to 230 c (446 f) for optimum results. the dwell time above the liquidus point of solder should be between 15 and 90 seconds. it usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. beyond a dwell time of 90 seconds, the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. the temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170 c (338 f), to allow the solder within the connections to freeze solid. process zone p4 is the cool down after solder freeze. the cool down rate, r5, from the liquidus point of the solder to 25 c (77 f) should not exceed 3 c per second maximum. this limitation is necessary to allow the pc board and HSDL-3201 castellations to change dimensions evenly, putting minimal stresses on the HSDL-3201 transceiver. 0 t-time (seconds) t ?temperature ?(?) 200 170 125 100 50 50 150 100 200 250 300 150 183 230 p1 heat up p2 solder paste dry p3 solder reflow p4 cool down 25 r1 r2 r3 r4 r5 90 sec. max. above 183? max. 245?
14 window design to insure irda compliance, some constraints on the height and width of the window exist. the minimum dimensions ensure that the irda cone angles are met without vignetting. the maximum dimensions minimize the effects of stray light. the minimum size corresponds to a cone angle of 30 degrees, the maximum, to a cone angle of 60 degrees. x is the width of the window, y is the height of the window, and z is the distance from the HSDL-3201 to the back of the window. the distance from the center of the led lens to the center of the photodiode lens is 5.1 mm. the equations for the size of the window are as follows: x = 5.1 +2(z + d) tan q y = 2(z + d) tan q where q is the required half angle for viewing. for the irda minimum, it is 15 degrees, for the irda maximum it is 30 degrees. (d is the depth of the led image inside the part, 3.17 mm). these equations result in the following tables and graphs: minimum and maximum window sizes dimensions are in mm. depth (z) y min. x min. y max. x max. 0 1.70 6.80 3.66 8.76 1 2.23 7.33 4.82 9.92 2 2.77 7.87 5.97 11.07 3 3.31 8.41 7.12 12.22 4 3.84 8.94 8.28 13.38 5 4.38 9.48 9.43 14.53 6 4.91 10.01 10.59 15.69 7 5.45 10.55 11.74 16.84 8 5.99 11.09 12.90 18.00 9 6.52 11.62 14.05 19.15 10 7.06 12.16 15.21 20.31 window height y vs. module depth z window width x vs. module depth z y x z window height y ?mm 16 module depth z ?mm 6 48 0 2 14 010 10 26 12 8 4 acceptable range 60?cone 30?cone window width x ?mm 22 module depth z ?mm 12 48 6 8 20 010 16 26 18 14 10 acceptable range 60?cone 30?cone
15 shape of the window from an optics standpoint, the window should be flat. this ensures that the window will not alter either the radiation pattern of the led, or the receive pattern of the photodiode. if the window must be curved for mechanical design reasons, place a curve on the back side of the window that has the same radius as the front side. while this will not completely eliminate the lens effect of the front curved surface, it will reduce the effects. the amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. the following drawings show the effects of a curved window on the radiation pattern. in all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. flat window (first choice) curved front, flat back (do not use) curved front and back (second choice)
test methods background light and electromagnetic field there are four ambient interference conditions in which the receiver is to operate correctly. the conditions are to be applied separately: 1. electromagnetic field: 3 v/m maximum (please refer to iec 801-3, severity level 3 for details). 2. sunlight: 10 kilolux maximum at the optical port. this is simulated with an ir source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased to provide 490 m w/cm 2 (with no modulation) at the optical port. the light source faces the optical port. this simulates sunlight within the irda spectral range. the effect of longer wavelength radiation is covered by the incandescent condition. 3. incandescent lighting: 1000 lux maximum. this is produced with general service, tungsten-filament, gas-filled, inside frosted lamps in the 60 watt to 100 watt range to generate 1000 lux over the horizontal surface on which the equipment under test rests. the light sources are above the test area. the source is expected to have a filament temperature in the 2700 to 3050 kelvin range and a spectral peak in the 850 to 1050 nm range. 4. fluorescent lighting: 1000 lux maximum. this is simulated with an ir source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased and modulated to provide an optical square wave signal (0 m w/cm 2 minimum and 0.3 m w/cm 2 peak amplitude with 10% to 90% rise and fall times less than or equal to 100 ns) over the horizontal surface on which the equipment under test rests. the light sources are above the test area. the frequency of the optical signal is swept over the frequency range from 20 khz to 200 khz. due to the variety of fluorescent lamps and the range of ir emissions, this condition is not expected to cover all circumstances. it will provide a common floor for irda operation. www.semiconductor.agilent.com data subject to change. copyright ? 2000 agilent technologies inc. obsoletes 5968-2033e 5980-1768e (6/00)

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